circuit note cn - 0232 circuits from the lab? reference circuits are engineered and tested for quick and easy system integration to help solve todays analog, mixed - signal, a nd rf design challenges. for more i nformation and/or support , visit www.analog.com/cn0232. devices connected /referenced adf4350 fractional - n pll synthesizer with i ntegrated vco adf415 3 fractional -n pll frequency synthesizer minimizing spurious outputs using a synthesizer with an integrated vco and an external pll circuit rev. 0 circuits from the lab? circuits from analog devices have been designed and built by analog devices engineers. standard engineering practices have been employed in the design and construction of each circuit, and their function and performance have been tested and verifi ed in a lab environment at room temperature. however, you are solely responsible for testing the circuit and determining its suitability and applicability for your use and application. accordingly, in no event shall analog devices be liable for direct, ind irect, special, incidental, consequential or punitive damages due to any cause whatsoever connected to the use of any circuits from the lab circuits. (continued on last page) one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.32 9.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. evaluation and desig n support circuit evaluation boards adf4350 evaluation board ( eval - adf4350eb 2 z ) ADF4153 evaluation board ( eval - ADF4153ebz1 ) design and integration files schematics, layout files, bill of materials circuit function and benefits the circuit shown in figure 1 uses the adf4350 synthesizer with an integrated vco and an external pll to minimize spurious outputs by isolating the pll synthesizer circui try from the vco circuit . 22nf 4.7nf 100nf 360? 200? ADF4153 cpgnd dgnd cp 1nf 1nf 4.7k? r set le data clk ref in dv dd muxout v dd sdv dd v p 100pf 100pf av dd agnd adf4350 v vco v vco v vco v vco dv dd av dd v p v tune cp out pdb rf sdv dd rf out b+ rf out b? rf out a? rf out a+ ce v dd cpgnd agnd dgnd 4.7k? r set le data clk ref in muxout lock detect 51? a gndvco ld sd gnd temp v ref v com sw 10pf 0.1f 1nf 1nf 1nf 1nf tcxo 26mhz 51? 51? 51? 51? 51? 51? 51? rfouta+ vco counters phase frequency detector charge pump counters phase frequency detector charge pump rfoutb+ vco tuning voltage reference loop filter rf in 3.3v 3.3v 3.3v 51? 10pf 0.1f 10pf 0.1f 1nf 1nf 8 11 12 13 1 2 3 1 29 spi compatible serial bus rf in a rf in b 15 3 4 9 6 5 14 7 2 16 10 10 28 16 8 31 9 11 18 21 27 14 15 19 23 24 25 30 17 20 7 26 6 32 5 4 12 13 22 spi compatible serial bus 10125-001 figure 1. ADF4153 pll c onnected to adf4350 (simplified schematic: all connections and decoupling not shown)
cn- 0232 circuit note rev. 0 | page 2 of 6 devices with i ntegrated pll s and vco s may have feed through from the digital pll circuitry to the vco , leading to higher spurious levels due to the close proximity of the pll circuitry to the vco. the circuit shown in figure 1 u s es the adf4350 , a fully integrated fractional - n pll and vco that can generate frequencies from 137.5 mhz to 4400 mhz , together with the ADF4153 pl l. in addition to improvements in spurious performance, another possible advantage of using an external pll is the possibility of increased frequency resolution . for example, if the adf4157 pll is selected in place of the ADF4153 , the f requency resolution of the pll can be as fine as 0.7 hz. circuit description the adf4350 is a wideband pll and vco consisting of three s eparate multi band vcos. each vco covers a range of approximately 700 mhz (with some overlap between the frequencies of the vco ). this permits a fundamental vco frequency range of between 2.2 ghz to 4.4 ghz. f requencies lower than 2.2 ghz can be generated u sing internal dividers within the adf4350 . for most applications , the internal pll of the adf4350 is used to lock the vco. in addition to locking the pll, the pll circuitry performs an additional vital function of vco band select , using the internal r eference (r) and feedback (n) counters of the internal pll to compare the vco o utput with the r eference input. f or frequency generation , the internal pll must be en abled and the desired frequency must be program med . t hen , once su ff icient time has elapsed for band select , the internal pll can be disabled , and , finally , the external pll can be enabled . the external pll compares the reference frequency and the vco outpu t frequency to generate a stable dc voltage to lock the pll. figure 2 shows the output frequency spurs measured at rf out a + using the adf4350 internal pll and vco with the ADF4153 pll disabled. note the presence of pfd spurs at 13 mhz and 26 mhz. figure 3 shows the output spurs measured at rf out a + with the adf4350 internal pll circuit disabled and the external ADF4153 pll active. in this mode, the charge pump output of the ADF4153 drives the loop filter, which in t urn drives the v tune input of the adf4350 . the v tune input controls the adf4350 vco output frequency. i n making a comparison between figure 2 and figure 3 , the spurs due to the phase frequency detector ( pfd ) frequency, at 13 mhz and 26 mhz, in figure 2 have disappeared into the noise floor in figure 3 . common variations different plls can be selected. the f ractional - n pll in both the adf4350 and ADF4153 has a minimum frequency resolution of pfd/4095. if finer resolution is required, the adf4157 can be selected. the resolution of this pll is pfd/2 25 , thereby providing an ultrafine resolution of <1 hz. for applications requiring simpler software programmability, the adf4150 pll is software compatible with the adf4350 , easing the software programming sequence.
circuit note cn- 0232 rev. 0 | page 3 of 6 r&s fsup signal source analyzer settings residual noise (t1 without spurs) spur list signal frequency: 1.6000ghz int phn (1.0k .. 30.0m): ?49.1dbc signal level: 5.44dbm residual pm: 0.285 cross corr mode: harmonic 1 residual fm: 3.24khz internal ref tuned: internal phase det rms jitter: 0.4946ps 1.000mhz ?83.82dbc 2.001mhz ?99.68dbc 3.000mhz ?89.92dbc 13.000mhz ?94.70dbc phase noise (dbc/hz) marker 1 (t1) marker 2 (t1) marker 3 (t1) marker 4 (t1) rf atten: 5db 1khz 10.98633khz 13.00011mhz 26.00002mhz top ?70dbc/hz ?91.84dbc/hz ?93.42dbc/hz ?94.7dbc ?87.89dbc 10k 100k 1m 10m 1k 30m ?160 ?170 ?150 ?140 ?130 ?120 ?110 ?100 ?90 ?80 ?70 spur power (dbc) frequency offset (hz) 4 1 2 3 spr off th 0db loop bw 300hz 10125-002 figure 2. adf4350 pfd spurs at 1.6 ghz r&s fsup signal source analyzer settings residual noise (t1 without spurs) spur list signal frequency: 1.6000ghz int phn (1.0k .. 30.0m): ?53.3dbc signal level: 1.71dbm residual pm: 0.174 cross corr mode: harmonic 1 residual fm: 1.846khz internal ref tuned: internal phase det rms jitter: 0.3025ps 1000.0khz ?90.44dbc 2.000mhz ?85.60dbc 3.000mhz ?96.36dbc 4.000mhz ?99.28dbc phase noise (dbc/hz) marker 1 (t1) marker 2 (t1) marker 3 (t1) marker 4 (t1) rf atten: 5db 1khz 1khz 100khz 1mhz top ?70dbc/hz ?101.23dbc/hz ?101.23dbc/hz ?120.62dbc ?144.68dbc 10k 100k 1m 10m 1k 30m ?160 ?170 ?150 ?140 ?130 ?120 ?110 ?100 ?90 ?80 ?70 spur power (dbc) frequency offset (hz) 1 2 3 spr off th 0db loop bw 300hz 10125-003 4 figure 3. adf4350 pfd spurs at 1.6 ghz u sing ADF4153 pll
cn- 0232 circuit note rev. 0 | page 4 of 6 circuit e valuation and t est th e cn - 0232 uses the eval - adf4350eb2z board for evaluation of the described circuit, and with some minor modifications , a llow s for quick setup and evaluation. the eval - adf4350eb2z board uses the standard adf4350 programming software , contained on the cd that accompanies the evaluati on board. the e va l - ADF4153ebz1 evaluation board comes with the software for the adf 4 153 pll. equipment needed ? e va l - adf4350eb2z with programming software . ? e va l - ADF4153ebz1 with programming software . ? 5.5 v power supply . ? r&s sma 1 00a signal generator or equivalent . ? r&s fsup26 spectrum analyzer or equiva lent . ? two pcs with windows? xp, windows, vista (32 - bit), or windows 7 (32 - bit) , one with an usb port and the other with a printer p ort. alternatively, the eval - adf4xxxx - usb usb adaptor kit can be used instead of the printer port , if none is available. the sma coaxial cable is required to connect rf out b + of the e va l - adf4350eb2z to rf in of the e va l - ADF4153ebz1 . a simple sma splitter is also needed t o share the reference source between the two boards . some flexible microcoaxial cable is required to connect the output of the ADF4153 loop filter to the adf4350 v tune i nput. to minimize unwanted interference, both sides of the cable must be grounded to suitable gnd points on each board. functional block diagram for this experiment, the e va l - ADF4153ebz1 and t he e va l - adf4350eb2z are used. the eva l - adf4350eb2z is selected because it contains the auxiliary rf out b + output stage , which is connected via sma ca ble to the e va l - ADF4153ebz1 , as shown in figure 4 . both plls use the same r eference input (refin) frequency ; therefore, an sma splitter connects the same refin to both boards. the loop filter output on the eva l - ADF4153ebz1 is connected to the v tune pin of the adf4350 via a shielded coaxial cable to ensure that no extra noise or s purs appear on the pin. both parts are programmed separately. it may be necessary to use different pcs for each board to ensure no conflicts occur between hardware drivers. getting started the ug - 110 user guide d etails the installation and use of the e va l - adf4350eb2z evaluation software. ug - 110 also contains board setup instructions and the board schematic, layout, an d bill of materials. the ug - 167 user guide contains similar information relevant to the e va l - ADF4153ebz1 . necessary modifications to the board are the remo val of the vco (y1). to reconfigure this board as an input, remove the r7 resistor and change r8 and r9 to 0 ?. the pll loop filter on the adf4350 board is unused and should be removed. at this point, the microcoaxial cable can be used to connect the output of the adf4 153 loop filter (t7) to the v tune pin of the adf4350 (t4). it is of critical importance that the outer shielding of this cable is connected to a ground point on both boards. reference frequency generator (r&s sma100a) spectrum analyzer (r&s fsup26) 9v battery power supply ? term ? term rfouta+ 5 ) 2 8 7 $ rfoutb+ rfin+ cp out vtune pc pc usb printer com 5.5v j14 j15 j4 adf4350 evaluation board (eval-adf4350eb2z) j2 j3 5 ) 2 8 7 % j5 j1 t4 t7 ADF4153 evaluation board (eval-ADF4153ebz1) j5 j2 eval- adf4xxxx-usb usb 10125-004 figure 4. test setup functional diagram
circuit note cn- 0232 rev. 0 | page 5 of 6 initialization procedure the adf4350 must go through the band select process for every new frequency . 1 . initialize the adf4 350 as normal ( p rogram r5, r4, r3, r2, r1 , r0), except set db4 , r2 to 1 (i cp three - state enabled), because the adf4350 charge pump is unused. set db9, r4 to 0 for divided vco output on rfoutb + . enable rfoutb + ( auxiliary out) . th is signal is fed to the ADF4153 over the coax cable . 2 . initialize the ADF4153 (as per the data sheet) to accept the vco output frequency as the r f input frequency. n ote that the band select switch is internal ; therefore, an external switch to remove the pll v tune is not required. 3 . when the ADF4153 achieves lock, the adf4350 counter reset to 1 (db3, r2 ) must be activated. not activating the counter res e t degrade s spur performance. additionally , all adf4350 synthesizer blocks can be powered down using the test mod e bit (db10 , r5). frequency update 1 . program db10, r5 to 0 to reactivate the adf4350 synthesizer blocks. 2 . program db3, r2 of the adf4350 to 0 to d eactivat e the coun ter reset because these counters are required for band select. 3 . program the adf4350 and ADF4153 n - counter registers as appropriate for the new frequency. 4 . when the ADF4153 achieves lock, the adf4350 counter reset (db3, r2) can be activated. additionally all synthesizer blocks can be powered down using the test mode bit (db10 , r5). 5 . repeat s tep 1 to step 4 as required for new frequencies. the software screen captures shown in figure 5 and figure 6 show the software window s for 26 mhz ref in ( adf4350 ) and 13 mhz pfd ( ADF4153 ) . after setting up the equipment, use standard rf test methods to measure the spectral purity of the output signal . 10125-005 figure 5. adf4350 software window 10125-006 figure 6. ADF4153 software window
cn- 0232 circuit note rev. 0 | page 6 of 6 learn more cn0232 design support package: http://www.analog.com/cn0232 - designsupport ug - 110, user guide for the eval - adf4350eb2z board ug - 167, user guide f or the eval - ADF4153ebz1 board mt - 031 tutorial, grounding data converters and solving the mystery of agnd and dgnd , analog devices. mt - 086 tutorial, fundamentals o f phase locked loops (plls), analog devices. mt - 101 tutorial, decoupling techniques , analog devices. adisimpll design tool data sheets and evaluation boards adf4350 evaluation board ( eva l - adf4350eb2z ) ADF4153 evaluation board ( eva l - ADF4153ebz1 ) ADF4153 data sheet adf4350 data sheet revision history 4 / 1 2 revision 0 : initial version (continued from first page) circuits from the lab circuits are intended only for use with analog devices products and are the intellectual property of an alog devices or its licensors. while you may use the circuits from the lab circuits in the design of your product, no other license is granted by implication or otherwise under any patents or othe r intellectual property by application or use of the circuits from the lab circuits. information furnished by analog devices is bel ieved to be accurate and reliable. however, circuits from the lab circuits are supplied "as is" and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warrant y of merchantability, noninfringement or fi tness for a particular purpose and no responsibility is assumed by analog devices for their use, nor for any infringements of patents or other right s of third parties that may result from their use. analog devices reserves the right to change any circuits from the lab circuits at any time without notice but is under no obligation to do so. ? 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respecti ve owners. cn10125 - 0 - 4/12(0)
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